Job description

INNOPHASE is a rapidly growing pre-IPO communications semiconductor company with headquarters in San Diego, CA, and advanced design centers in Irvine, CA, San Jose, CA, and Bangalore, India. We are pioneering a revolutionary 5G platform that will transform cellular network deployments. Utilizing our breakthrough, patented, wireless technology we are bringing to market a portfolio of SoCs and solutions with a unique value proposition for 5G applications. To learn more about InnoPhase, visit www.innophaseinc.com.

In this job you will be working with a team of digital design engineers to develop novel SoC products for connectivity and communications. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. In addition to delivering high quality digital solutions in the context of the product architecture, the team supports other disciplines with work product such as Veriloga stimulus files, test benches for device bring up/characterization, test vectors for product manufacturing, etc.

This is a full-time position based in San Jose. InnoPhase also offers several office locations in CA and a hybrid remote/office work environment providing an excellent balanced environment for a results-oriented individual committed to continuous improvement, learning, and collaboration.

Key Responsibilities

• Contribute to/review SoC specifications and architectures
• Front to back digital design and verification – RTL through physical implementation
• Hands on technical leadership
• Support schedule and resource planning
• Help define and socialize digital/system design, implementation methodologies and test strategies and flows
• Debug designs and provide timely closure
• Work with System, Software, RF, Analog, and Test teams and provide necessary support

Job Requirements

• MS/PhD EE/CS preferred
• 15+ years of experience digital SoC Development required
• Hands on experience successfully verifying complex SoCs
• Experience bringing highly integrated mixed signal SoCs to commercial mass production
• Experience with embedded systems, wireless protocols, power management, signal processing and standard digital interfaces
• Deep knowledge of Verilog and SystemVerilog
• Deep knowledge of front-end tools (Verilog simulators, linters, clock-domain crossing checkers)
• Proven knowledge of synthesis, static timing, DFT and (Front to Back) F2B digital SoC design flow
• Experience with ATPG, fault grading, scan, BIST, DFT/DFM
• Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
• Knowledge of languages such as C/C++, Perl, Tcl and Python
• Strong communication and presentation skills
• Good skills and interest in recruiting and mentorship
• Team player with strong sense of urgency to complete projects on time

Desirable Skills

• Experience with Cadence F2B design tools
• Experience with formal verification tools
• Able to work effectively with incomplete or changing requirements
• Good skills an interest in mentorship
• Strong knowledge of mixed signal concepts
• Focused, goal driven finisher

Job Type: Full-time

Pay: $150,000.00 - $250,000.00 per year

Benefits:

• 401(k)
• Dental insurance
• Employee assistance program
• Employee discount
• Flexible schedule
• Flexible spending account
• Health insurance
• Life insurance
• Paid time off
• Parental leave
• Professional development assistance
• Referral program
• Relocation assistance
• Retirement plan
• Vision insurance

Schedule:

• 8 hour shift

Education:

• Master's (Required)

Experience:

• Digital SoC Design: 10 years (Required)
• RTL: 10 years (Required)

Work Location: Hybrid remote in San Jose, CA 95134

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